Adam Jundt has worked in High Performance Computing for over 10 years. Starting as a user in grad school (MS in Computer Science with focus on HPC), MPI Developer at Cray, Performance Support at CCT@LSU and SDSC@UCSD for XSEDE researchers, Developer at EP Analytics, and Senior Sales Engineer at Advanced HPC. He has published and presented HPC research at local and international conferences and co-authored proposals that resulted in funding from DOE, DOD, NASA, and NSF. His work has focused on extracting the best energy and performance out of HPC systems and finding matches between application needs and available hardware.

Adam's Blog

Memory Configuration and Performance on Scalable Processors

November 9, 2019

We often see requests for multiple memory configurations ranging from 2-12 DIMMs per socket. Some of our customers would like to have 128/256/512/ 1024GB of RAM for the latest generation of Intel Xeon Scalable processors.

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Cascade Lake Processors

August 25, 2019

Intel’s latest Xeon line (Cascade Lake) were released in Q2’19. These processors are socket compatible with the previous generation (Skylake), but may require a BIOS update on existing LGA3647 motherboards for support.

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